The semiconductor integrated circuit (IC) industry has experienced rapid growth. Technological advances in IC materials and design have produced generations of ICs where each generation has smaller and more complex circuits than the previous generation. However, these advances have increased the complexity of processing and manufacturing ICs and, for these advances to be realized, similar developments in IC processing and manufacturing are needed. In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component that can be created using a fabrication process) has decreased.
The constantly decreasing geometry size leads to challenges in fabricating high voltage semiconductor transistor devices. These high voltage transistor devices may need a sufficiently large voltage drop from a gate of the transistor device to a drain region of the transistor device. Traditionally, the large voltage drop has been accomplished by pushing the drain region away from the gate and source region, effectively lengthening the drain region. However, as transistor device sizes become smaller, it becomes impractical to lengthen the drain region.
Therefore, while existing methods of fabricating high voltage transistors have been generally adequate for their intended purposes, they have not been entirely satisfactory in every aspect.